An integrated circuit, e.g., a die, a chip or an SOC (system on chip), etc., is one of the most essential hardware foundations of contemporary information society. Generally, an integrated circuit includes a plurality of circuit blocks, e.g., combinations of circuit cells and circuit units, gate arrays, various processing units, silicon intellectual properties (IP) circuits, interface circuits or embedded memories, etc. Different circuit blocks are located at different positions of a layout of an integrated circuit.
For allowing two circuit blocks at different positions of an integrated circuit to work in coordination with each other, the two circuit blocks should have synchronized clocks. Accordingly, the integrated circuit has a clock tree for transmitting a same main operation clock to the two circuit blocks via serially-coupled buffers. However, the clock tree is readily influenced by variations of fabricating process, power supply and operating temperature. Consequently, the clocks received by the two circuit blocks are actually not in synchronization with each other (have a phase difference between the received clocks), a clock skew therefore occurs.
To address the clock skew issue, a conventional technique attempts to form a clock tree by regularly symmetric routings. However, for implementing such technique, the circuit blocks of the integrated circuits must have regular shapes, sizes, positions and arrangements. Since modern integrated circuit has to implement diversified functions, it needs to adopt circuit blocks of different sizes, and these circuit blocks are difficult to be arranged regularly. Consequently, it is difficult for such technology to comply with design trends of modern integrated circuit.
In another conventional technique, a clock transmitted to a circuit block is sent back to a start point of the clock tree, such that clock skew may be corrected. However, such technique equivalently needs two clock trees; one of the two clock trees transmits the clock to the circuit block, and the other clock tree send the clock back from the circuit block. Therefore, such technology will dramatically increase hardware complexity, waste layout area, and consume additional operation power. Moreover, since the equivalent impedance of the two clock trees are different, accuracy of correction is impaired.
In still another conventional technique, an integrated circuit is equipped with two clock trees; one clock tree transmits a normal clock, and the other clock tree transmits a calibration clock; a phase of the normal clock may then be adjusted according to the phase difference between the normal clock and the calibration clock. However, since the two clock trees are influenced by variations due to fabricating process, power supply and operating temperature, it is difficult to correctly suppress the clock skew.